YAP IP Projects
CPU core
A high performance yet simple to program general purpose processor available as IP for
chip designs. The YAP processor was designed for the GCC compiler and GNU toolchain. A
Linux port is planned. The processor also includes a 128-bit SIMD vector instruction set
to enable high performance video codecs.
For more information visit the web site
http://www.yapip.com/ and
contact Jonah Probell.
CABAC Codec
A Context-based Adaptive Binary Arithmetic Coding encoder and decoder available as IP for
chip designs. The CABAC codec is implemented in Verilog with a corresponding C model. It
is generalized and configurable to be applicable to H.264 and JPEG 2000 video and image
codecs as well as any other type of data with redundancy.
For more information contact Jonah Probell.
Video Test Streams
A collection of encoded and raw video data for all widely used codec standards and
container file formats. This 200 gigabyte collection of more than 8000 files is useful
for stress testing multi-standard video processor hardware and software designs.
For more information contact Jonah Probell.
© Copyright 2009 Jonah Probell
|
|