I worked for Lexra, a scrappy CPU company, now out of business. The Lexra story is an interesting one, filled with lessons
about the business of selling microprocessors and semiconductor intellectual property. I have found many incorrect
statements published about Lexra. With this document, I hope to set the record straight.
Lexra was founded in 1997 but the story begins in the 1980s. Academics at Stanford and Berkeley realized that a
computer processor could achieve higher performance by running simpler instructions at a higher clock speed. Such a
computer processor is known as a reduced instruction set computer (RISC). The MIPS instruction set was developed
as an academic project at Stanford by a group working under the direction of John Hennessy who has since been promoted
to president of Stanford. MIPS originally stood for microprocessor without interlocked pipeline stages. MIPS Computer
Systems Inc. was formed to develop and sell commercial chips that executed the MIPS instruction set. The largest
customer of MIPS Computer Systems Inc was Silicon Graphics, which dominated the market for high end workstations used
for creating synthetic digital graphics and animations. In the early 1990s MIPS Computer Systems was in danger of
going out of business so Silicon Graphics acquired their key chip supplier.
Also in the 1990s it became apparent to the developers of chips for embedded systems (any machine with a computer
processor that is not a PC, workstation, or server) that the simplicity of RISC processor architectures made them
well suited for such small low-cost chips. Advanced RISC Machines Ltd. (ARM) proved this quite successfully with
their own RISC instruction set, initially developed in the early 1990s. ARM pioneered the business of developing a
processor without making chips and licensing the design to many other companies that make chips. This is known as
the semiconductor intellectual property (SIP) business.
The founders of Lexra, Charlie Cheng and Pat Hays, recognized that the MIPS-I instruction set architecture (ISA) was a
classic RISC processor architecture with all of the properties that make a processor useful for embedded chips, plus
the benefit of having an existing strong base of software development tools (compilers, assemblers, debuggers, etc.).
Lexra incorporated and began developing a SIP core that executed the MIPS-I instruction set. Lexra developed
its processor from scratch without using any source code or other intellectual property from any other company.
Incidentally, at the time, ARM only licensed hard core chip lay-outs. Lexra was among the first SIP companies to
license configurable, extensible soft core RTL designs, which has since become the preferred method for delivering SIP
products.
Nobody can patent, copyright, or otherwise own an instruction set. This was demonstrated when Intel began making
clones as a second source of IBM processors and later proven in court when AMD made clones as a second source of
Intel processors. Lexra had the right, legally and ethically, to design a SIP core that executed a 15 year old
instruction set that was created for academic purposes.
Meanwhile, back in Mountain View, Silicon Graphics' business was struggling despite a booming high tech economy.
Silicon Graphics spun-out MIPS Technologies, Inc. as a semiconductor intellectual property licensing company that
would compete directly with Lexra after Lexra was already established in that business. Due to a single deal
between Silicon Graphics and Nintendo, MIPS Technologies Inc. began its life with approximately ten times as much
money as Lexra. MIPS Technologies also had about five times as many engineers as Lexra.
Though you can not patent an instruction set, you can patent designs and methods that are necessary to implement a
particular unusual instruction that is part of the instruction set. That prevents competitors from creating a fully
compatible clone of your processor without infringing your patent. There are four instructions in the MIPS-I
instruction set that are protected by one US patent,
4,814,976.
These instructions, lwl, lwr, swl, and swr are known as the unaligned load and store instructions. These instructions
are useful in systems in which memory is scarce or expensive. In such systems, it is often useful to pack 16-bit or
32-bit data values in to memory in such a way that they are aligned to arbitrary byte boundaries and not necessarily
to natural 16-bit half-word or 32-bit word boundaries. Accessing such unaligned variables requires at least two bus
clock cycles, whereas accesses to aligned data can be performed in a single cycle. Most assembly programmers and
compilers for modern systems align data to their natural address boundaries in order to gain the system bus
performance benefit of aligned loads and stores.
Prudent high tech companies study their competitors' patent portfolios, and Lexra was no exception. Lexra was well
aware of the patent on unaligned loads and stores that was owned by Silicon Graphics and later by MIPS Technologies.
To avoid infringing, Lexra chose not to implement unaligned loads and stores in its processor design.
When MIPS filed its S-1 IPO prospectus form it sued Lexra for copyright infringement. The suit was settled after
a few months with Lexra agreeing not to use MIPS trademarks without attribution and to state in its documentation
and in its public statements that it implemented "the MIPS-I instruction set except for unaligned loads and stores".
MIPS Technologies agreed to the settlement, apparently acknowledging that Lexra did not execute unaligned loads and
stores.
If a Lexra processor encountered an unaligned load or store instruction in the program that it was executing then it
did the same thing that it would do for any other invalid opcode, it took a reserved instruction exception. In the
second lawsuit between MIPS Technologies and Lexra, MIPS Technologies claimed that because an exception handler
could be created to emulate the function of unaligned loads and stores in software with many other instructions
Lexra's processors infringed the patent. Upon learning of this broad interpretation of the patent, Lexra requested
that the US Patent and Trademark office (PTO) reexamine whether the patent was novel when granted. Almost every
microprocessor in the world can emulate the functionality of unaligned loads and stores in software. MIPS Technologies
did not invent that. By any reasonable interpretation of the MIPS Technologies' patent, Lexra did not infringe.
In mid-2001 Lexra received a preliminary ruling from the PTO that key claims in the unaligned load and store patent
were invalid because of prior art in an IBM CISC patent. MIPS Technologies appealed the PTO ruling and also won a
favorably broad interpretation of the language of the patent from a judge that forced Lexra into a settlement that
included dropping the reexamination request before MIPS Technologies might have lost its appeal.
One interesting problem with the patent system is that one institution, the PTO, determines whether a
patent is valid but a different institution, the courts, determine whether one infringes. It is entirely possible for
the two institutions to interpret a patent differently and for either a non-infringer to be wrongly convicted or an
infringer to get away with their crime.
The case of MIPS Technologies v Lexra was ultimately settled out of court and the request for reexamination of the
patent was dropped. To this day there is no precedent indicating that processors that execute the MIPS-I instruction
set that treat unaligned loads and stores are reserved instructions, such as Lexra's, infringed the '976 patent. The
patent expired on December 23, 2006 at which point it became legal for anybody to implement the complete MIPS-I
instruction set, including unaligned loads and stores, without any fear of being found to infringe MIPS Technologies'
patents.
It has been interesting to watch as the Chinese company, BLX, has made and sold powerful processors in China that
execute MIPS-based instruction sets. BLX is legally and morally clear of violating MIPS Technologies' patents. BLX has
chosen not to pay anything to MIPS Technologies while a host of American companies with their own powerful MIPS
instruction set processors pay large sums of money to MIPS Technologies for the privilege of not being hassled by
lawsuits. After its experience with Lexra MIPS Technologies changed all of its 32-bit cores to use its new MIPS32
instruction set which extends the MIPS-I instruction set to include other features patented by MIPS Technologies.
This is similar to Intel's addition of the MMX instruction set extensions to Pentium III in order to prevent AMD from
building compatible processors.
Cores from Lexra as compared to cores from MIPS Technologies were smaller, had higher clock speed, had high
performance instruction extensions, brought features (such as on-chip debug, MIPS16, write-back caches, MMU, and
more) to market sooner, and were less expensive. Despite MIPS Technologies' relatively abundant resources, their
product offerings in the market were inferior, their investors wanted to see MIPS Technologies defend its
intellectual property, and MIPS Technologies needed to justify the license fees that other companies such as
Broadcom, PMC-Sierra, and LSI Logic were paying for rights to use the instruction set for their own processors. This
left MIPS Technologies little choice but to sue Lexra, despite a weak case.
Ultimately, MIPS Technologies hurt Lexra's business, Lexra hurt MIPS Technologies' business, and ARM made off with a
solid dominance of the SIP market. In the court case MIPS Technologies' stalled at every opportunity possible until
Lexra ran out of money to fight. Because MIPS Technologies started the game with far more money than Lexra, they
outlasted and Lexra was forced into a settlement. Though MIPS Technologies was suing Lexra, the settlement agreement
involved MIPS paying Lexra money. The benefit that MIPS Technologies got in exchange was that Lexra exited the SIP
business. Lexra failed one year later in an attempt to establish itself as a communications chip company during the
bottom of the telecom business downturn.
Some Lexra customers disabled the reserved instruction exception for unaligned loads and stores in their chip
products. With such a design modification, unaligned loads and stores are treated as no-ops and can not be emulated in
an exception handler. MIPS Technologies would have no claim of infringement against such designs. Despite that, since
settling with Lexra, MIPS Technologies has threatened legal action against Lexra's former customers. Many companies
each find it less expensive to agree to contracts that require payments to MIPS rather than to fight. This strategy by
MIPS Technologies is viewed by some as extortion under threat of malicious prosecution. If that is so, then such
contracts can be voided and former Lexra customers could demand repayment from MIPS Technologies. That argument was
made stronger when MIPS Technologies filed suit against Trident Microsystems in December 2006, shortly before the '976
patent expired.
Lexra had about 40 licensees while it was in business, about 30 of which manufactured chips with Lexra processor
cores. Some chips based on Lexra processor cores are still in production today. Many Lexra licensees do not want their
use of Lexra to be known, and I will not expose them. Several publicly known Lexra core users include
Macronix, a digital still camera chip maker in Taiwan,
Micronas, an audio/video/automotive chip maker in Europe,
Realtek, a wired/wireless LAN ethernet chip maker in Taiwan,
Zoran, a digital still camera, DVD, and video system chip maker in Israel and
Silicon Valley, Analog Devices, a multi-market DSP chip maker headquartered
in Massachusetts (through its acquisition of Chiplogic), and Trident
Microsystems, a digital television chip maker. Many hobbyists have adapted the Realtek RTL8181 chip for
other purposes by writing software that runs on the Lexra LX5280 processor in the RTL8181.
I am a hardware, not a software, engineer but I know that in principal it is possible to compile software for Lexra
processors using the gnu gcc tools for the MIPS-I R3000 processor. This can be done either by writing an exception
trap handler for reserved instructions that detects unaligned load and store instructions and emulates their
functionality with shifts and aligned loads and stores or else modifying the compiler so that it does not generate
lwl, lwr, swl, and swr instructions. With either of those changes, any C code can run on Lexra processors.
Advanced hobbyists might even choose to accelerate their critical inner loops by coding them in assembly code using
digital signal processing (DSP) instructions that Lexra implemented as extensions to the MIPS-I instruction set.
Each core that Lexra created built on its predecessors:
| CPU |
distinguishing feature |
pipeline stages |
code base |
test chip |
target market |
notes |
| LX4080 |
MIPS-I RISC soft core |
5 stage pipeline |
|
yes |
|
|
| LX4180 |
with MIPS16 code compression and EJTAG on-chip debug |
yes |
|
155 MHz push-button synthesis in .25um technology |
| LX4189 |
configurable multi-way write-back caches and a MMU |
6 stage pipeline |
Z |
|
|
266 MHz push-button synthesis in .18um technology |
| LX4280 |
dual-issue superscalar |
yes |
|
200 MHz push-button synthesis in .18um technology |
| LX5180 |
power efficient DSP enhanced with Radiax DSP extensions |
|
DSP |
|
| LX5280 |
dual-issue superscalar enhanced with Radiax DSP extensions |
yes x2 |
DSP |
200 MHz push-button synthesis in .18um technology |
| LX8000 |
coarse-grained multithreading |
|
NPU |
450 MHz in a .15um hard core |
| NetVortex |
a chip multiprocessor (CMP) packet processing system |
|
NPU |
16 CPUs at 450 MHz |
| LX4380 |
deeper pipeline |
7 stage pipeline |
Y |
|
|
300 MHz push-button synthesis in .15um technology |
| LX4580 |
fine-grained hardware multithreading (HMT) |
W |
|
NPU |
400 MHz in .13um technology |
The LX4580 fine-grained multithreaded processor was a cool internal processor
design that ran at 400 MHz with push-button synthesis in .13um technology but was never licensed.
It was the processor core for Lexra's Stream Processor chip project that never made
it to tape-out.
Lexra also offered a LX-PB20K general purpose FPGA / PLD prototyping board.
Products known to contain Lexra processors:
- Minolta Dimage7 digital still cameras, using the
Macronix image processing chip
- Toshiba SD3750, SD4700, and SD4800 DVD, VCD, MP3-CD, CD players,
using the Zoran Vaddis 5 chip
- Toshiba SDP2000 portable DVD player,
using the Zoran Vaddis 5 chip
- Toshiba RD-X2 DVD-Ram/HDD recorder,
using the Zoran Vaddis 5 chip
- Arcam FMJ DV27A, DiVA DV78, DV79, DV79 HDMI, DV88 Plus and DV89 DVD players,
using the Zoran Vaddis 5 chip
- Pioneer DVR-3000 DVD recorder,
using the Zoran Vaddis 5 chip
- many wireless access points
and gateways using the LX5280-based Realtek RTL8181 chip
- products using the LX4280-based Micronas
MDE-9500 or MDE-9502 including:
- The Cabot Communications Callisto over-air
download module and Mercator MHEG-5 development kit for integrated analog & digital
televisions.
- products using the LX4189-based Analog Devices
AD6489, AD6680, AD6681, Fusiv-VX200 (AD6834), AD6836, Fusiv-NP 210 (AD6843),
Fusiv-NP 220 (AD6844), Fusiv-NP 230 (AD6846), or AD6847 including:
- The Sagem F@St series residential and SOHO
triple-play modems and gateways
- The icube Play@TV home networking
audio/video player set-top box.
- The Viewtran video phone
- The NEC UNIVERGE IX2004 router for small
enterprises
- The Yamaha RTX1500 enterprise router
- other undisclosed large carrier-oriented equipment
There are many other products with Lexra inside that I have yet to confirm.
I write this with no disrespect or hard feelings towards my many friends - and they are friends - at MIPS Technologies.
However, I feel great pride knowing that people are still using Lexra processors. As best I can, I will help anybody
using Lexra processors today.
Feel free to contact me.
A note on BLX:
From what I have read, BLX has developed some advanced high performance processors.
I do not know specifically what instructions BLX implements in their Godson-I, Godson-II,
and upcoming Godson-III processors. Based on
this statement
by Godson developer Hu Weiwu it appears clear that BLX processors do not implement unaligned
loads and stores in hardware in a way that infringes MIPS Technologies' patents. That being the
case, I wish BLX the best fortunes in their developments.
If you have documentation on any of the BLX processors that you can send to me
without violating any copyrights then please do.
© Copyright 2005-2007 Jonah Probell
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